mirror of
https://github.com/signalwire/freeswitch.git
synced 2025-08-13 17:38:59 +00:00
Various tweaks to spandsp, including starting to add some genuine ARM
optimisations.
This commit is contained in:
@@ -230,6 +230,7 @@ static int process_rx_indicator(t38_core_state_t *t, void *user_data, int indica
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/* Protect against T.38 stuff arriving after we've actually finished. */
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if (fe->current_rx_type == T30_MODEM_DONE)
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return 0;
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/*endif*/
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if (t->current_rx_indicator == indicator)
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{
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@@ -333,6 +334,7 @@ static int process_rx_data(t38_core_state_t *t, void *user_data, int data_type,
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/* Protect against T.38 stuff arriving after we've actually finished. */
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if (fe->current_rx_type == T30_MODEM_DONE)
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return 0;
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/*endif*/
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/* In termination mode we don't care very much what the data type is apart from a couple of
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special cases. */
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@@ -608,6 +610,7 @@ static void send_hdlc(void *user_data, const uint8_t *msg, int len)
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{
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if (s->t38_fe.us_per_tx_chunk)
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s->t38_fe.hdlc_tx.extra_bits = extra_bits_in_stuffed_frame(msg, len);
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/*endif*/
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bit_reverse(s->t38_fe.hdlc_tx.buf, msg, len);
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s->t38_fe.hdlc_tx.len = len;
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s->t38_fe.hdlc_tx.ptr = 0;
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@@ -774,6 +777,7 @@ static int stream_non_ecm(t38_terminal_state_t *s)
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fe->timed_step = T38_TIMED_STEP_NON_ECM_MODEM_5;
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if (front_end_status(s, T30_FRONT_END_SEND_STEP_COMPLETE) < 0)
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return -1;
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/*endif*/
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break;
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}
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/*endif*/
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@@ -805,6 +809,7 @@ static int stream_non_ecm(t38_terminal_state_t *s)
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/*endif*/
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if (front_end_status(s, T30_FRONT_END_SEND_STEP_COMPLETE) < 0)
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return -1;
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/*endif*/
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break;
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}
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/*endif*/
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@@ -825,6 +830,10 @@ static int stream_non_ecm(t38_terminal_state_t *s)
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fe->timed_step = fe->queued_timed_step;
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fe->queued_timed_step = T38_TIMED_STEP_NONE;
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}
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else
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{
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fe->timed_step = T38_TIMED_STEP_NONE;
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}
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/*endif*/
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return delay;
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}
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@@ -910,6 +919,7 @@ static int stream_hdlc(t38_terminal_state_t *s)
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fe->hdlc_tx.len = 0;
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if (front_end_status(s, T30_FRONT_END_SEND_STEP_COMPLETE) < 0)
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return -1;
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/*endif*/
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/* The above step should have got the next HDLC step ready - either another frame, or an instruction to stop transmission. */
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if (fe->hdlc_tx.len >= 0)
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{
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@@ -941,6 +951,7 @@ static int stream_hdlc(t38_terminal_state_t *s)
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/*endif*/
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if (front_end_status(s, T30_FRONT_END_SEND_STEP_COMPLETE) < 0)
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return -1;
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/*endif*/
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}
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/*endif*/
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break;
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@@ -971,6 +982,7 @@ static int stream_hdlc(t38_terminal_state_t *s)
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fe->hdlc_tx.len = 0;
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if (front_end_status(s, T30_FRONT_END_SEND_STEP_COMPLETE) < 0)
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return -1;
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/*endif*/
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/* The above step should have got the next HDLC step ready - either another frame, or an instruction to stop transmission. */
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if (fe->hdlc_tx.len >= 0)
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{
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@@ -1006,6 +1018,7 @@ static int stream_hdlc(t38_terminal_state_t *s)
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/*endif*/
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if (front_end_status(s, T30_FRONT_END_SEND_STEP_COMPLETE) < 0)
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return -1;
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/*endif*/
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}
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/*endif*/
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break;
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@@ -1018,6 +1031,10 @@ static int stream_hdlc(t38_terminal_state_t *s)
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fe->timed_step = fe->queued_timed_step;
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fe->queued_timed_step = T38_TIMED_STEP_NONE;
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}
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else
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{
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fe->timed_step = T38_TIMED_STEP_NONE;
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}
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/*endif*/
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return delay;
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}
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@@ -1063,6 +1080,7 @@ static int stream_ced(t38_terminal_state_t *s)
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fe->timed_step = fe->queued_timed_step;
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if (front_end_status(s, T30_FRONT_END_SEND_STEP_COMPLETE) < 0)
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return -1;
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/*endif*/
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return 0;
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}
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/*endswitch*/
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