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https://github.com/signalwire/freeswitch.git
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Further changes to polish the long training/short training issues that spoilt
T.38 gateway operation with some FAX machines
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2a1a3867d1
commit
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@ -1627,6 +1627,7 @@ static void non_ecm_rx_status(void *user_data, int status)
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s->audio.modems.rx_trained = TRUE;
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s->audio.modems.rx_trained = TRUE;
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s->core.timed_mode = TIMED_MODE_IDLE;
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s->core.timed_mode = TIMED_MODE_IDLE;
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s->core.samples_to_timeout = 0;
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s->core.samples_to_timeout = 0;
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s->core.short_train = TRUE;
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to_t38_buffer_init(&s->core.to_t38);
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to_t38_buffer_init(&s->core.to_t38);
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break;
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break;
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case SIG_STATUS_CARRIER_UP:
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case SIG_STATUS_CARRIER_UP:
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@ -1792,6 +1793,7 @@ static void hdlc_rx_status(hdlc_rx_state_t *t, int status)
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/* The modem is now trained. */
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/* The modem is now trained. */
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s->audio.modems.rx_signal_present = TRUE;
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s->audio.modems.rx_signal_present = TRUE;
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s->audio.modems.rx_trained = TRUE;
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s->audio.modems.rx_trained = TRUE;
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s->core.short_train = TRUE;
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/* Behave like HDLC preamble has been announced. */
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/* Behave like HDLC preamble has been announced. */
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t->framing_ok_announced = TRUE;
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t->framing_ok_announced = TRUE;
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to_t38_buffer_init(&s->core.to_t38);
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to_t38_buffer_init(&s->core.to_t38);
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@ -1358,12 +1358,12 @@ SPAN_DECLARE(int) v17_rx_restart(v17_rx_state_t *s, int bit_rate, int short_trai
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s->carrier_phase_rate = dds_phase_ratef(CARRIER_NOMINAL_FREQ);
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s->carrier_phase_rate = dds_phase_ratef(CARRIER_NOMINAL_FREQ);
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equalizer_reset(s);
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equalizer_reset(s);
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#if defined(SPANDSP_USE_FIXED_POINTx)
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#if defined(SPANDSP_USE_FIXED_POINTx)
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//s->agc_scaling_save = 0;
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s->agc_scaling_save = 0;
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s->agc_scaling = (float) FP_FACTOR*32768.0f*0.0017f/RX_PULSESHAPER_GAIN;
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s->agc_scaling = (float) FP_FACTOR*32768.0f*0.0017f/RX_PULSESHAPER_GAIN;
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s->carrier_track_i = 5000;
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s->carrier_track_i = 5000;
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s->carrier_track_p = 40000;
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s->carrier_track_p = 40000;
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#else
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#else
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//s->agc_scaling_save = 0.0f;
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s->agc_scaling_save = 0.0f;
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s->agc_scaling = 0.0017f/RX_PULSESHAPER_GAIN;
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s->agc_scaling = 0.0017f/RX_PULSESHAPER_GAIN;
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s->carrier_track_i = 5000.0f;
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s->carrier_track_i = 5000.0f;
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s->carrier_track_p = 40000.0f;
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s->carrier_track_p = 40000.0f;
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@ -1371,6 +1371,7 @@ SPAN_DECLARE(int) v17_rx_restart(v17_rx_state_t *s, int bit_rate, int short_trai
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}
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}
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s->last_sample = 0;
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s->last_sample = 0;
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span_log(&s->logging, SPAN_LOG_FLOW, "Phase rates %f %f\n", dds_frequencyf(s->carrier_phase_rate), dds_frequencyf(s->carrier_phase_rate_save));
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span_log(&s->logging, SPAN_LOG_FLOW, "Phase rates %f %f\n", dds_frequencyf(s->carrier_phase_rate), dds_frequencyf(s->carrier_phase_rate_save));
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span_log(&s->logging, SPAN_LOG_FLOW, "Gains %f %f\n", s->agc_scaling_save, s->agc_scaling);
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/* Initialise the working data for symbol timing synchronisation */
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/* Initialise the working data for symbol timing synchronisation */
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#if defined(SPANDSP_USE_FIXED_POINTx)
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#if defined(SPANDSP_USE_FIXED_POINTx)
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@ -1407,7 +1408,7 @@ SPAN_DECLARE(v17_rx_state_t *) v17_rx_init(v17_rx_state_t *s, int bit_rate, put_
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case 9600:
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case 9600:
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case 7200:
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case 7200:
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case 4800:
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case 4800:
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/* 4800 is an extension of V.17, to provide full converage of the V.32bis modes */
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/* 4800 is an extension of V.17, to provide full coverage of the V.32bis modes */
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break;
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break;
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default:
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default:
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return NULL;
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return NULL;
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@ -1425,13 +1426,6 @@ SPAN_DECLARE(v17_rx_state_t *) v17_rx_init(v17_rx_state_t *s, int bit_rate, put_
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s->short_train = FALSE;
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s->short_train = FALSE;
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//s->scrambler_tap = 18 - 1;
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//s->scrambler_tap = 18 - 1;
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v17_rx_signal_cutoff(s, -45.5f);
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v17_rx_signal_cutoff(s, -45.5f);
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#if defined(SPANDSP_USE_FIXED_POINTx)
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s->agc_scaling_save = 0;
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s->agc_scaling = (float) FP_FACTOR*32768.0f*0.0017f/RX_PULSESHAPER_GAIN;
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#else
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s->agc_scaling_save = 0.0f;
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s->agc_scaling = 0.0017f/RX_PULSESHAPER_GAIN;
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#endif
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s->carrier_phase_rate_save = dds_phase_ratef(CARRIER_NOMINAL_FREQ);
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s->carrier_phase_rate_save = dds_phase_ratef(CARRIER_NOMINAL_FREQ);
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v17_rx_restart(s, bit_rate, s->short_train);
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v17_rx_restart(s, bit_rate, s->short_train);
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return s;
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return s;
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