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https://github.com/signalwire/freeswitch.git
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d2edcad66e
Thanks to Phil Zimmermann for the code and for the license exception we needed to include it. There remains some build system integration work to be done before this code will build properly in the FreeSWITCH tree.
323 lines
12 KiB
C
323 lines
12 KiB
C
/*
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* Copyright (c) 1995 Colin Plumb. All rights reserved.
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* For licensing and other legal details, see the file legal.c.
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*/
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#include "lbnppc.h"
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/*
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* lbnppc.c - Assembly primitives for the bignum library, PowerPC version.
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*
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* Copyright (c) 1995 Colin Plumb. All rights reserved.
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* For licensing and other legal details, see the file legal.c.
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*
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* Register usage during function calls is:
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* r0 - volatile
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* r1 - stack pointer, preserved
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* r2 - TOC pointer, preserved
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* r3 - First argument and return value register
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* r4-r10 - More argument registers, volatile
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* r11-r12 - Volatile
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* r13-r31 - Preserved
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* LR, CTR, XER and MQ are all volatile.
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* LR holds return address on entry.
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*
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* On the PPC 601, unrolling the loops more doesn't seem to speed things
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* up at all. I'd be curious if other chips differed.
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*/
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#if __MWERKS__ < 0x800
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#include "ppcasm.h" /* PowerPC assembler */
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/*
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* MulN1 expects (*out, *in, len, k), count >= 1
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* r3 r4 r5 r6
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*/
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static const unsigned mulN1[] = {
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PPC_LWZ(7,4,0), /* Load first word of in in r7 */
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PPC_MULLW(8,7,6), /* Low half of multiply in r8 */
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PPC_MTCTR(5), /* Move len into CTR */
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PPC_ADDIC(0,0,0), /* Clear carry bit for loop */
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PPC_MULHWU(5,7,6), /* High half of multiply in r5 */
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PPC_STW(8,3,0),
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PPC_BC(18,31,7), /* Branch to Label if --ctr == 0 */
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/* Loop: */
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PPC_LWZU(7,4,4), /* r7 = *++in */
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PPC_MULLW(8,7,6), /* r8 = low word of product */
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PPC_ADDE(8,8,5), /* Add carry word r5 and bit CF to r8 */
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PPC_STWU(8,3,4), /* *++out = r8 */
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PPC_MULHWU(5,7,6), /* r5 is high word of product, for carry word */
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PPC_BC(16,31,-5), /* Branch to Loop if --ctr != 0 */
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/* Label: */
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PPC_ADDZE(5,5), /* Add carry flag to r5 */
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PPC_STW(5,3,4), /* out[1] = r5 */
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PPC_BLR()
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};
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/*
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* MulAdd1 expects (*out, *in, len, k), count >= 1
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* r3 r4 r5 r6
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*/
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static unsigned const mulAdd1[] = {
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PPC_LWZ(7,4,0), /* Load first word of in in r7 */
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PPC_LWZ(0,3,0), /* Load first word of out into r0 */
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PPC_MULLW(8,7,6), /* Low half of multiply in r8 */
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PPC_MTCTR(5), /* Move len into CTR */
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PPC_MULHWU(5,7,6), /* High half of multiply in r5 */
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PPC_ADDC(8,8,0), /* r8 = r8 + r0 */
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PPC_STW(8,3,0), /* Store result to memory */
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PPC_BC(18,31,10), /* Branch to Label if --ctr == 0 */
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/* Loop: */
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PPC_LWZU(7,4,4), /* r7 = *++in */
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PPC_LWZU(0,3,4), /* r0 = *++out */
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PPC_MULLW(8,7,6), /* r8 = low word of product */
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PPC_ADDE(8,8,5), /* Add carry word r5 and carry bit CF to r8 */
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PPC_MULHWU(5,7,6), /* r5 is high word of product, for carry word */
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PPC_ADDZE(5,5), /* Add carry bit from low add to r5 */
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PPC_ADDC(8,8,0), /* r8 = r8 + r0 */
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PPC_STW(8,3,0), /* *out = r8 */
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PPC_BC(16,31,-8), /* Branch to Loop if --ctr != 0 */
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/* Label: */
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PPC_ADDZE(3,5), /* Add carry flag to r5 and move to r3 */
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PPC_BLR()
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};
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/*
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* MulSub1 expects (*out, *in, len, k), count >= 1
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* r3 r4 r5 r6
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*
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* Multiply and subtract is rather a pain. If the subtract of the
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* low word of the product from out[i] generates a borrow, we want to
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* increment the carry word (initially in the range 0..0xfffffffe).
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* However, the PPC's carry bit CF is *clear* after a subtract, so
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* we want to add (1-CF) to the carry word. This is done using two
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* instructions:
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*
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* SUBFME, subtract from minus one extended. This computes
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* rD = ~rS + 0xffffffff + CF. Since rS is from 0 to 0xfffffffe,
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* ~rS is from 1 through 0xffffffff, and the sum with 0xffffffff+CF is
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* from 0 through 0xfffffffff, setting the carry flag unconditionally, and
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* NOR, which is used as a bitwise invert NOT instruction.
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*
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* The SUBFME performs the computation rD = ~rS + 0xffffffff + CF,
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* = (-rS - 1) + (CF - 1) = -(rS - CF + 1) - 1 = ~(rS + 1-CF),
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* which is the bitwise complement of the value we want.
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* We want to add the complement of that result to the low word of the
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* product, which is just what a subtract would do, if only we could get
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* the carry flag clear. But it's always set, except for SUBFE, and the
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* operation we just performed unconditionally *sets* the carry flag. Ugh.
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* So find the complement in a separate instruction.
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*/
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static unsigned const mulSub1[] = {
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PPC_LWZ(7,4,0), /* Load first word of in in r7 */
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PPC_LWZ(0,3,0), /* Load first word of out into r0 */
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PPC_MTCTR(5), /* Move len into CTR */
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PPC_MULLW(8,7,6), /* Low half of multiply in r8 */
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PPC_MULHWU(5,7,6), /* High half of multiply in r5 */
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PPC_SUBFC(8,8,0), /* r8 = r0 - r8, setting CF */
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PPC_STW(8,3,0), /* Store result to memory */
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PPC_SUBFME(5,5), /* First of two insns to add (1-CF) to r5 */
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PPC_BC(18,31,12), /* Branch to Label if --ctr == 0 */
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/* Loop: */
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PPC_LWZU(7,4,4), /* r7 = *++in */
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PPC_LWZU(0,3,4), /* r0 = *++out */
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PPC_NOR(5,5,5), /* Second of two insns to add (1-CF) to r5 */
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PPC_MULLW(8,7,6), /* r8 = low word of product */
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PPC_ADDC(8,8,5), /* Add carry word r5 to r8 */
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PPC_MULHWU(5,7,6), /* r5 is high word of product, for carry word */
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PPC_ADDZE(5,5), /* Add carry bit from low add to r5 */
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PPC_SUBFC(8,8,0), /* r8 = r0 - r8, setting CF */
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PPC_STW(8,3,0), /* *out = r8 */
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PPC_SUBFME(5,5), /* First of two insns to add (1-CF) to r5 */
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PPC_BC(16,31,-10), /* Branch to Loop if --ctr != 0 */
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/* Label: */
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PPC_NOR(3,5,5), /* Finish adding (1-CF) to r5, store in r3 */
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PPC_BLR()
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};
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#if 0
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/*
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* Args: BNWORD32 *n, BNWORD32 const *mod, unsigned mlen, BNWORD32 inv)
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* r3 r4 r5 r6
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* r7, r8 and r9 are the triple-width accumulator.
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* r0 and r10 are temporary registers.
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* r11 and r12 are temporary pointers into n and mod, respectively.
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* r2 (!) is another temporary register.
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*/
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static unsigned const montReduce[] = {
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PPC_MTCTR(5), /* ??? */
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PPC_LWZ(7,3,0), /* Load low word of n into r7 */
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PPC_LWZ(10,4,0), /* Fetch low word of mod */
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PPC_MULLW(0,7,6), /* Invert r7 into r0 */
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PPC_STW(0,3,0), /* Store back for future use */
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PPC_MULHWU(8,10,7), /* Get high word of whatnot */
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PPC_MULLW(10,10,7), /* Get low word of it */
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PPC_ADDC(7,7,10), /* Add low word of product to r7 */
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PPC_ADDZE(8,8), /* Add carry to high word */
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PPC_
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PPC_MULHW(8,7,6),
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PPC_ADDC(7,7,0), /* Add inverse back to r7 */
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PPC_ADDZE(8,8),
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PPC_
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PPC_LWZU(
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/* Loop: */
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PPC_LWZU(0,11,4),
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PPC_LWZU(10,23,-4),
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PPC_MULLW(2,0,10),
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PPC_ADDC(7,7,2),
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PPC_MULHWU(0,0,10),
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PPC_ADDE(8,8,0),
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PPC_ADDZE(9,9),
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PPC_BC(16,31,-7), /* Branch to Loop if --ctr != 0 */
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PPC_ADDIC_(count,-1),
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PPC_LWZU(0,x,4),
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PPC_ADDC(0,7,0),
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PPC_STW(0,x,0),
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PPC_ADDZE(7,8),
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PPC_ADDZE(8,9),
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PPC_LI(9,0),
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PPC_BC(xx,2,yy),
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};
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#endif
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/*
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* Three overlapped transition vectors for three functions.
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* A PowerPC transition vector for a (potentially) inter-module
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* jump or call consists of two words, an instruction address
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* and a Table Of Contents (TOC) pointer, which is loaded into
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* r1. Since none of the routines here have global variables,
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* they don't need a TOC pointer, so the value is unimportant.
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* This array places an unintersting 32-bit value after each address.
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*/
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unsigned const * const lbnPPC_tv[] = {
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mulN1,
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mulAdd1,
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mulSub1,
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0
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};
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#else /* __MWERKS >= 0x800 */
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/*
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* MulN1 expects (*out, *in, len, k), count >= 1
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* r3 r4 r5 r6
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*/
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asm void
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lbnMulN1_32(register unsigned *out, register unsigned const *in,
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register unsigned len, register unsigned k)
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{
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lwz r7,0(in) /* Load first word of in in r7 */
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mtctr len /* Move len into CTR */
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mullw r8,r7,k /* Low half of multiply in r8 */
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addic r0,r0,0 /* Clear carry bit for loop */
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mulhwu len,r7,k /* High half of multiply in len */
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stw r8,0(out) /* *out = r8 */
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mulhwu len,r7,k /* len is high word of product, for carry */
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bdz- label /* Branch to Label if --ctr == 0 */
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loop:
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lwzu r7,4(in) /* r7 = *++in */
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mullw r8,r7,k /* Low half of multiply in r8 */
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adde r8,r8,len /* Add carry word len and bit CF to r8 */
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stwu r8,4(out) /* *++out = r8 */
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mulhwu len,r7,k /* len is high word of product, for carry */
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bdnz+ loop /* Branch to Loop if --ctr != 0 */
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label:
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addze len,len /* Add carry flag to carry word */
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stw len,4(out)
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blr
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}
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/*
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* MulAdd1 expects (*out, *in, len, k), count >= 1
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* r3 r4 r5 r6
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*/
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asm unsigned
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lbnMulAdd1_32(register unsigned *out, register unsigned const *in,
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register unsigned len, register unsigned k)
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{
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lwz r7,0(in) /* Load first word of in in r7 */
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lwz r0,0(out) /* Load first word of out into r0 */
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mullw r8,r7,k /* Low half of multiply in r8 */
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mtctr len /* Move len into CTR */
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mulhwu len,r7,k /* High half of multiply in len */
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addc r8,r8,r0 /* r8 = r8 + r0 */
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stw r8,0(out) /* Store result to memory */
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bdz- label /* Branch to Label if --ctr == 0 */
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loop:
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lwzu r7,4(in) /* r7 = *++in */
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lwzu r0,4(out) /* r0 = *++out */
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mullw r8,r7,k /* r8 = low word of product */
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adde r8,r8,len /* Add carry word len and carry bit CF to r8 */
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mulhwu len,r7,k /* len is high word of product, for carry */
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addze len,len /* Add carry bit from low add to r5 */
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addc r8,r8,r0 /* r8 = r8 + r0 */
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stw r8,0(out) /* *out = r8 */
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bdnz+ loop /* Branch to Loop if --ctr != 0 */
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label:
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addze r3,r5 /* Add carry flag to r5 and move to r3 */
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blr
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}
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/*
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* MulSub1 expects (*out, *in, len, k), count >= 1
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* r3 r4 r5 r6
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*
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* Multiply and subtract is rather a pain. If the subtract of the
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* low word of the product from out[i] generates a borrow, we want to
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* increment the carry word (initially in the range 0..0xfffffffe).
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* However, the PPC's carry bit CF is *clear* after a subtract, so
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* we want to add (1-CF) to the carry word. This is done using two
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* instructions:
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*
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* SUBFME, subtract from minus one extended. This computes
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* rD = ~rS + 0xffffffff + CF. Since rS is from 0 to 0xfffffffe,
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* ~rS is from 1 through 0xffffffff, and the sum with 0xffffffff+CF is
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* from 0 through 0xfffffffff, setting the carry flag unconditionally, and
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* NOR, which is used as a bitwise invert NOT instruction.
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*
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* The SUBFME performs the computation rD = ~rS + 0xffffffff + CF,
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* = (-rS - 1) + (CF - 1) = -(rS - CF + 1) - 1 = ~(rS + 1-CF),
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* which is the bitwise complement of the value we want.
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* We want to add the complement of that result to the low word of the
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* product, which is just what a subtract would do, if only we could get
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* the carry flag clear. But it's always set, except for SUBFE, and the
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* operation we just performed unconditionally *sets* the carry flag. Ugh.
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* So find the complement in a separate instruction.
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*/
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asm unsigned
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lbnMulSub1_32(register unsigned *out, register unsigned const *in,
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register unsigned len, register unsigned k)
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{
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lwz r7,0(in) /* Load first word of in in r7 */
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lwz r0,0(out) /* Load first word of out into r0 */
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mtctr len /* Move len into CTR */
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mullw r8,r7,k /* Low half of multiply in r8 */
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mulhwu len,r7,k /* High half of multiply in len */
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subfc r8,r8,r0 /* r8 = r0 - r8, setting CF */
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stw r8,0(out) /* Store result to memory */
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subfme len,len /* First of two insns to add (1-CF) to len */
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bdz- label /* Branch to Label if --ctr == 0 */
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loop:
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lwzu r7,4(in) /* r7 = *++in */
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lwzu r0,4(out) /* r0 = *++out */
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nor len,len,len /* Second of two insns to add (1-CF) to len */
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mullw r8,r7,k /* r8 = low word of product */
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addc r8,r8,len /* Add carry word len to r8 */
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mulhwu len,r7,k /* len is high word of product, for carry */
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addze len,len /* Add carry bit from low add to len */
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subfc r8,r8,r0 /* r8 = r0 - r8 */
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stw r8,0(out) /* *out = r8 */
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subfme len,len /* First of two insns to add (1-CF) to len */
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bdnz+ loop /* Branch to Loop if --ctr != 0 */
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label:
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nor r3,r5,r5 /* Finish adding (1-CF) to len, store in r3 */
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blr
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}
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#endif /* __MWERKS >= 0x800 */
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/* 45678901234567890123456789012345678901234567890123456789012345678901234567 */
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